A parallelization compile method disclosed in a patent document, Japanese Patent Laid-Open No. 2015-1807 (patent document 1) listed below, for example, serves as a parallelization method to generate a parallel program for a multi-core microcomputer based on a single program for a single-core microcomputer.
In such parallelization compile method, an intermediate language is generated from a source code of the single program by performing a lexical analysis and a syntax analysis, and, by using such an intermediate language, a dependency analysis and optimization and the like of a plurality of macro tasks (i.e., unit processes hereafter) are performed. Further, the parallelization compile method generates the parallel program based on a scheduling of the plurality of unit processes, which takes into account the dependency of each of the unit processes, and an execution time of each of the unit processes.
However, in a general embedded system, multiple tasks are executed in a switching manner by a real time operating system (RTOS). In such case, even though the parallel program may be generated by parallelizing those tasks, a synchronization process is required for parallelizing the multiple tasks, which makes it necessary for the RTOS to allocate a process time for the synchronization process.
That means, when the parallel program is relatively small, the process time reduced by the parallelization of the multiple tasks is surpassed by an overhead time that is required by the synchronization process. Therefore, the benefit of parallelization may not necessarily be enjoyed by all multi-task programs. In other words, the relatively short process time tasks are not suitably parallelized.
Further, the parallelization of the above-described tasks with the shot process time is not only difficult, but also is prone to an interference with other tasks, which makes it more difficult to execute in parallel, i.e., simultaneously.
For addressing parallelization of the short process time tasks, performing an inter-core exclusion process in addition to a relevant process may be one solution. However, the inter-core exclusion process has a much greater overhead in comparison to an intra-core exclusion process used in the single core microcomputer, which may greatly deteriorate the processing capacity of the multi-core microcomputer.